1. Field of the Invention
The present invention relates to a frame buffer apparatus and related frame data retrieving method, and more particularly, to an apparatus and method directly utilizing a hold-type display panel as a frame buffer by reading back pixel voltages of the hold-type display panel.
2. Description of the Prior Art
Compared with impulse-type driving methods of traditional cathode ray tube (CRT) displays, hold-type displays like liquid crystal displays (LCDs), usually suffer from slow response time problem, and thus motion blur phenomenon often occurs when motion picture are displayed. In order to speed up the response speed of LCDs and achieve better image quality as well, some image processing techniques, such as over-driving, de-interlacing, motion compensation, and frame rate conversion, are wildly applied in current products. However, the above-mentioned image processing techniques usually need to store at least one frame data for image processing to generate video data of a next output image frame. Therefore, in the prior art, the display system must use memories like dynamic random access memory (DRAM) or static random access memory (SRAM) as a frame buffer for storing the frame data.
Please refer to FIG. 1. FIG. 1 is a diagram of a video data processor 10 of a display according to the prior art. The video data processor 10 is coupled between a video source (not shown in FIG. 1) and a display system 130. As shown in FIG. 1, the video data processor 10 includes a memory 100, a memory control unit 110 and a data processing unit 120. The memory 100 is utilized as a frame buffer for storing image data of previous image frames; the memory control unit 110 is utilized for controlling access to the memory 100; and the data processing unit 120 is utilized for performing calculations such as over-driving, de-interlacing, motion compensation or frame rate conversion to output image data to the display system 130 according to the image data stored in the memory 100 and currently received video data. Thus, the display system 130 can output driving voltages for displaying corresponding images according to the image data outputted by the video data processor 10.
Please further refer to FIG. 2. FIG. 2 is a schematic diagram of the display system 130 of a hold-type display according to the prior art. The display system 130 includes a display panel 131, a control circuit 132, a data driving circuit 133 and a scan circuit 134. The control circuit 132 is utilized for generating corresponding control signals to respectively output to the data driving circuit 133 and the scan circuit 134 with respect to a horizontal synchronization signal 135 and a vertical synchronization signal 136. According to the control signals generated by the control circuit 132, the scan circuit 134 can turn on each scan line of the display panel 131 in order, and the data driving circuit 133 can output the driving voltages to the display panel 131 for controlling brightness status of corresponding pixels further according to image data 137 generated by the above-mentioned video data processor 10, so as to display corresponding images.
Therefore, in the prior arts, in order to achieve the specific image processing function, the hold-type displays must have extra memories as the frame buffer for storing corresponding frame data, so that the cost of such a display system will be more expensive.